1. Field of the Invention
The present invention relates to semiconductor devices and methods for forming semiconductor devices. More particularly, the invention relates to forming high dielectric gate insulation above field effect transistors.
2. Description of Related Art
High-k (dielectric constant) dielectric materials have been used to replace silicon oxide/nitride as the gate dielectric in MOSFET (metal-oxide-semiconductor field-effect transistor) devices as the size of MOSFET devices continually becomes smaller and smaller. The high dielectric constant of the high-k dielectric material allows increased gate capacitance while inhibiting leakage due to tunneling. New issues and/or problems arise as the designs of structures using high-k dielectric materials, the processes for forming such structures (e.g., gate first high-k metal gate (HKMG) processes), and the uses of such structures continue to change. Thus, there is continuing development of new solutions to overcome some of these issues and/or problems.
Certain problems may be seen with the use of high-k dielectric materials in gate stack structures in gate first HKMG processes. For example, because the gate stack uses several materials in combination with the high-k dielectric material, one potential problem with using high-k dielectric materials in gate stack structures is the possible delamination between two or more of the materials used in the gate stack (e.g., delamination at one or more interfaces between different materials in the gate stack). Delamination at one or more interfaces between materials in the gate stack may cause problems such as high resistance in series with the gate (e.g., high gate series resistance). The high gate series resistance (e.g., on the order of MΩ, 10 MΩ, or more in resistance) in the transistor may not cause failure of the transistor but may slow down the transistor to unacceptable or undesirable levels.